Make – Which Shell is Used in GNU Make Files?

You are correct regarding the Makefile the only things that happen are defined in it or companion scripts that get run. "Best practices" when upgrading software from source is typically to use the uninstall option if you did not run a make clean or delete your original source installation directory.

You have to be careful though, should the program have installed files outside of /usr/local you might remove files that were added by the package manager. Often main configuration files like Apache's do not get clobbered and simply deleted during installation they can or are preserved. Though this is not always the case. You can backup every destination with the -b or --backup option to install.

Edit: Looking at the Makefile.in for the current version of httpd it looks like several of their cp commands add the -p switch which preserve ownership and timestamps.

If your code excerpt is properly representative, it seems that you are typing Bash commands directly in your Makefile and expecting Make to execute them with Bash. That's not how it works. The syntax of a Makefile is entirely different. Within a recipe, you can type Bash commands; each separate line in a recipe will be executed in a separate sub-shell. So you need at least two changes:

• Your shell commands need to be in a target.
• The declare needs to run in the same shell as the loop; otherwise you declare in one Bash instance, then exit that, then run the loop in a separate instance which knows nothing about the now-lost declare.

Here is a simple refactoring of your Makefile with these changes.

SHELL=/bin/bash   # This is the standard compliant method

.PHONY: all
all:
    declare -A PROVS=( ["NL"]=10 ["PE"]=11 ["NS"]=12 ["NB"]=13 \
        ["QC"]=24 ["ON"]=35 ["MB"]=46 ["SK"]=47 ["AB"]=48 \
        ["BC"]=59 ["YK"]=60 ["NT"]=61 ["NU"]=62 )\
    ; for key in "$${!PROVS[@]}" ; do \
        touch "foo_$${key}_$${PROVS[$${key}]}" ; \
    done

Demo: http://ideone.com/t94AOB

The @ convention to run a command silently applies to the entire command line. Thus, you can put it before declare above, in which case it will be stripped off before the entire command line is submitted to Bash. Anywhere else, it will not be stripped or understood, and it will obviously cause a Bash syntax error in the called shell.

(The obsession with @ rules is an anti-pattern anyway. Run with make -s if you don't want to see the output; shutting up make will only make it harder to debug your rules.)