Makefile – Tool to Expand All ‘Include’ Directives

makescripting

Let us say we have the following Makefile

include config.mk

# Generate summary table.
results.txt : $(ZIPF_SRC) isles.dat abyss.dat last.dat
    $(ZIPF_EXE) *.dat > $@

# Count words.
.PHONY : dats
dats : isles.dat abyss.dat last.dat

%.dat : books/%.txt $(COUNT_SRC)
    $(COUNT_EXE) $< $*.dat

.PHONY : clean
clean :
    rm -f *.dat
    rm -f results.txt

where all the variables are defined in config.mk

LANGUAGE=python
COUNT_SRC=countwords.py
COUNT_EXE=$(LANGUAGE) $(COUNT_SRC)
ZIPF_SRC=testzipf.py
ZIPF_EXE=$(LANGUAGE) $(ZIPF_SRC)

Is there any tool available that can expand all the include lines within the makefile so as to produce a bigMakefile? If such a tool does not currently exist, can a python/perl/awk/bash script be cooked up to achieve this goal?

Best Answer

The GNU Awk manual's section on getline has an almost perfect example:

For example, the following program copies all the input files to the output, except for records that say @include filename. Such a record is replaced by the contents of the file filename:

{
     if (NF == 2 && $1 == "@include") {
          while ((getline line < $2) > 0)
               print line
          close($2)
     } else
          print
}

You just need to modify it to match include instead of @include.

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