Shell – Makefile and .ONESHELL

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When .ONESHELL is not used Makefile executes each shell commands in a separate shell. What is the benefit of this? Why doesn't makefile uses the same shell?

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One reason is that a failure in one of the recipe commands would not be detected by GNU make. Only the final exit status of the shell would be given to make. One would have to additionally set .SHELLFLAGS to -e to get the shell to terminate early upon errors (this is required for multi-command shell invocations even without .ONESHELL if they need to fail at the first error).

This is all well and good for when SHELL is a POSIX shell. A Makefile can also set SHELL to e.g. /usr/bin/perl or some other command interpreter. It may then be appropriate, or not, to use .ONESHELL.

Making .ONESHELL the default behaviour in make would potentially break older Makefiles.

Even though this is not a question relating to the POSIX standard or the compliance to that standard by GNU make, the Rationale of the POSIX specification for make has this to say about the issue at hand:

The default in some advanced versions of make is to group all the command lines for a target and execute them using a single shell invocation; the System V method is to pass each line individually to a separate shell. The single-shell method has the advantages in performance and the lack of a requirement for many continued lines. However, converting to this newer method has caused portability problems with many historical makefiles, so the behavior with the POSIX makefile is specified to be the same as that of System V. It is suggested that the special target .ONESHELL be used as an implementation extension to achieve the single-shell grouping for a target or group of targets.

GNU make is POSIX compliant in this respect as it implements the System V behaviour and provides a .ONESHELL target for enabling the alternative behaviour, if wanted. ... which is another reason for GNU make to keep the current behaviour.

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Shell – What are the reasons for each line in Makefile to be executed in a separate shell

I can't tell you the rationale of the make makers, but one shell per recipe line makes sense to me in that there is only one state to be kept and modified and that's the state in the make process. Also, one fresh shell per line ensures that each line does the same thing every time it is executed. If it always were the same shell recipe lines and even entire recipies might have side effects on each other and the make process has virtually no method of detecting what is desireable and what is not ... let alone controling that behaviour. A shell per line makes every line atomic and program flow is returned to make, which gives a lot more power to make.

File function in makefile takes args prefixed by ‘@’ symbol

There are three unrelated uses of @ here.

In $@, the character @ is the name of an automatic variable that can be used in a rule. The value of that variable is the target that the rule is building.

When @ is used at the very beginning of a recipe (command) line, just after the tab character, it causes the command not to be printed when it's about to be executed.

The character @ elsewhere isn't special.

Thus, in your example, to build program:

The file function is invoked. It writes the dependencies of the target ($^ automatic variable) to the file program.in.
Whatever command is stored in the variable CMD is executed, with the parameters stored in the variable CMDFLAGS, plus the extra parameter @program.in. What this does depends on what CMD is.
The command rm program.in is executed, without printing it first.

A few commands treat a parameter starting with @ as indicating a file from which to read more parameters. This is a DOS convention which came about because DOS had a stringent limit on the command line length and no way to interpolate the output of a command into a command line. It is uncommon in the Unix world since Unix doesn't have these limitations. The effect of the recipe is thus likely the same as

$(CMD) $(CMDFLAGS) $(OBJECTS)

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Shell – What are the reasons for each line in Makefile to be executed in a separate shell

File function in makefile takes args prefixed by ‘@’ symbol

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