How can I tell whether my processor has a particular feature? (64-bit instruction set, hardware-assisted virtualization, cryptographic accelerators, etc.) I know that the file /proc/cpuinfo
contains this information, in the flags
line, but what do all these cryptic abbreviations mean?
For example, given the following extract from /proc/cpuinfo
, do I have a 64-bit CPU? Do I have hardware virtualization?
model name : Intel(R) Core(TM)2 Duo CPU E8400 @ 3.00GHz
…
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts rep_good aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 lahf_lm tpr_shadow vnmi flexpriority
Best Answer
x86
(32-bit a.k.a. i386–i686 and 64-bit a.k.a. amd64. In other words, your workstation, laptop or server.)
FAQ: Do I have…
lm
vmx
(Intel),svm
(AMD)aes
smx
hypervisor
Most of the other features are only of interest to compiler or kernel authors.
All the flags
The full listing is in the kernel source, in the file
arch/x86/include/asm/cpufeatures.h
.Intel-defined CPU features, CPUID level 0x00000001 (edx)
See also Wikipedia and table 2-27 in Intel Advanced Vector Extensions Programming Reference
fpu
: Onboard FPU (floating point support)vme
: Virtual 8086 mode enhancementsde
: Debugging Extensions (CR4.DE)pse
: Page Size Extensions (4MB memory pages)tsc
: Time Stamp Counter (RDTSC)msr
: Model-Specific Registers (RDMSR, WRMSR)pae
: Physical Address Extensions (support for more than 4GB of RAM)mce
: Machine Check Exceptioncx8
: CMPXCHG8 instruction (64-bit compare-and-swap)apic
: Onboard APICsep
: SYSENTER/SYSEXITmtrr
: Memory Type Range Registerspge
: Page Global Enable (global bit in PDEs and PTEs)mca
: Machine Check Architecturecmov
: CMOV instructions (conditional move) (also FCMOV)pat
: Page Attribute Tablepse36
: 36-bit PSEs (huge pages)pn
: Processor serial numberclflush
: Cache Line Flush instructiondts
: Debug Store (buffer for debugging and profiling instructions)acpi
: ACPI via MSR (temperature monitoring and clock speed modulation)mmx
: Multimedia Extensionsfxsr
: FXSAVE/FXRSTOR, CR4.OSFXSRsse
: Intel SSE vector instructionssse2
: SSE2ss
: CPU self snoopht
: Hyper-Threading and/or multi-coretm
: Automatic clock control (Thermal Monitor)ia64
: Intel Itanium Architecture 64-bit (not to be confused with Intel's 64-bit x86 architecture with flagx86-64
or "AMD64" bit indicated by flaglm
)pbe
: Pending Break Enable (PBE# pin) wakeup supportAMD-defined CPU features, CPUID level 0x80000001
See also Wikipedia and table 2-23 in Intel Advanced Vector Extensions Programming Reference
syscall
: SYSCALL (Fast System Call) and SYSRET (Return From Fast System Call)mp
: Multiprocessing Capable.nx
: Execute Disablemmxext
: AMD MMX extensionsfxsr_opt
: FXSAVE/FXRSTOR optimizationspdpe1gb
: One GB pages (allowshugepagesz=1G
)rdtscp
: Read Time-Stamp Counter and Processor IDlm
: Long Mode (x86-64: amd64, also known as Intel 64, i.e. 64-bit capable)3dnowext
: AMD 3DNow! extensions3dnow
: 3DNow! (AMD vector instructions, competing with Intel's SSE1)Transmeta-defined CPU features, CPUID level 0x80860001
recovery
: CPU in recovery modelongrun
: Longrun power controllrti
: LongRun table interfaceOther features, Linux-defined mapping
cxmmx
: Cyrix MMX extensionsk6_mtrr
: AMD K6 nonstandard MTRRscyrix_arr
: Cyrix ARRs (= MTRRs)centaur_mcr
: Centaur MCRs (= MTRRs)constant_tsc
: TSC ticks at a constant rateup
: SMP kernel running on UPart
: Always-Running Timerarch_perfmon
: Intel Architectural PerfMonpebs
: Precise-Event Based Samplingbts
: Branch Trace Storerep_good
: rep microcode works wellacc_power
: AMD accumulated power mechanismnopl
: The NOPL (0F 1F) instructionsxtopology
: cpu topology enum extensionstsc_reliable
: TSC is known to be reliablenonstop_tsc
: TSC does not stop in C statescpuid
: CPU has CPUID instruction itselfextd_apicid
: has extended APICID (8 bits)amd_dcm
: multi-node processoraperfmperf
: APERFMPERFeagerfpu
: Non lazy FPU restorenonstop_tsc_s3
: TSC doesn't stop in S3 statetsc_known_freq
: TSC has known frequencymce_recovery
: CPU has recoverable machine checksIntel-defined CPU features, CPUID level 0x00000001 (ecx)
See also Wikipedia and table 2-26 in Intel Advanced Vector Extensions Programming Reference
pni
: SSE-3 (“Prescott New Instructions”)pclmulqdq
: Perform a Carry-Less Multiplication of Quadword instruction — accelerator for GCM)dtes64
: 64-bit Debug Storemonitor
: Monitor/Mwait support (Intel SSE3 supplements)ds_cpl
: CPL Qual. Debug Storevmx
: Hardware virtualization: Intel VMXsmx
: Safer mode: TXT (TPM support)est
: Enhanced SpeedSteptm2
: Thermal Monitor 2ssse3
: Supplemental SSE-3cid
: Context IDsdbg
: silicon debugfma
: Fused multiply-addcx16
: CMPXCHG16Bxtpr
: Send Task Priority Messagespdcm
: Performance Capabilitiespcid
: Process Context Identifiersdca
: Direct Cache Accesssse4_1
: SSE-4.1sse4_2
: SSE-4.2x2apic
: x2APICmovbe
: Move Data After Swapping Bytes instructionpopcnt
: Return the Count of Number of Bits Set to 1 instruction (Hamming weight, i.e. bit count)tsc_deadline_timer
: Tsc deadline timeraes
/aes-ni
: Advanced Encryption Standard (New Instructions)xsave
: Save Processor Extended States: also provides XGETBY,XRSTOR,XSETBYavx
: Advanced Vector Extensionsf16c
: 16-bit fp conversions (CVT16)rdrand
: Read Random Number from hardware random number generator instructionhypervisor
: Running on a hypervisorVIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001
rng
: Random Number Generator present (xstore)rng_en
: Random Number Generator enabledace
: on-CPU crypto (xcrypt)ace_en
: on-CPU crypto enabledace2
: Advanced Cryptography Engine v2ace2_en
: ACE v2 enabledphe
: PadLock Hash Enginephe_en
: PHE enabledpmm
: PadLock Montgomery Multiplierpmm_en
: PMM enabledMore extended AMD flags: CPUID level 0x80000001, ecx
lahf_lm
: Load AH from Flags (LAHF) and Store AH into Flags (SAHF) in long modecmp_legacy
: If yes HyperThreading not validsvm
: “Secure virtual machine”: AMD-Vextapic
: Extended APIC spacecr8_legacy
: CR8 in 32-bit modeabm
: Advanced Bit Manipulationsse4a
: SSE-4Amisalignsse
: indicates if a general-protection exception (#GP) is generated when some legacy SSE instructions operate on unaligned data. Also depends on CR0 and Alignment Checking bit3dnowprefetch
: 3DNow prefetch instructionsosvw
: indicates OS Visible Workaround, which allows the OS to work around processor errata.ibs
: Instruction Based Samplingxop
: extended AVX instructionsskinit
: SKINIT/STGI instructionswdt
: Watchdog timerlwp
: Light Weight Profilingfma4
: 4 operands MAC instructionstce
: translation cache extensionnodeid_msr
: NodeId MSRtbm
: Trailing Bit Manipulationtopoext
: Topology Extensions CPUID leafsperfctr_core
: Core Performance Counter Extensionsperfctr_nb
: NB Performance Counter Extensionsbpext
: data breakpoint extensionptsc
: performance time-stamp counterperfctr_l2
: L2 Performance Counter Extensionsmwaitx
:MWAIT
extension (MONITORX
/MWAITX
)Auxiliary flags: Linux defined - For features scattered in various CPUID levels
ring3mwait
: Ring 3 MONITOR/MWAITcpuid_fault
: Intel CPUID faultingcpb
: AMD Core Performance Boostepb
: IA32_ENERGY_PERF_BIAS supportcat_l3
: Cache Allocation Technology L3cat_l2
: Cache Allocation Technology L2cdp_l3
: Code and Data Prioritization L3invpcid_single
: effectivelyinvpcid
andCR4.PCIDE=1
hw_pstate
: AMD HW-PStateproc_feedback
: AMD ProcFeedbackInterfacesme
: AMD Secure Memory Encryptionpti
: Kernel Page Table Isolation (Kaiser)retpoline
: Retpoline mitigation for Spectre variant 2 (indirect branches)retpoline_amd
: AMD Retpoline mitigationintel_ppin
: Intel Processor Inventory Numberavx512_4vnniw
: AVX-512 Neural Network Instructionsavx512_4fmaps
: AVX-512 Multiply Accumulation Single precisionmba
: Memory Bandwidth Allocationrsb_ctxsw
: Fill RSB on context switchesVirtualization flags: Linux defined
tpr_shadow
: Intel TPR Shadowvnmi
: Intel Virtual NMIflexpriority
: Intel FlexPriorityept
: Intel Extended Page Tablevpid
: Intel Virtual Processor IDvmmcall
: preferVMMCALL
toVMCALL
Intel-defined CPU features, CPUID level 0x00000007:0 (ebx)
fsgsbase
: {RD/WR}{FS/GS}BASE instructionstsc_adjust
: TSC adjustment MSRbmi1
: 1st group bit manipulation extensionshle
: Hardware Lock Elisionavx2
: AVX2 instructionssmep
: Supervisor Mode Execution Protectionbmi2
: 2nd group bit manipulation extensionserms
: Enhanced REP MOVSB/STOSBinvpcid
: Invalidate Processor Context IDrtm
: Restricted Transactional Memorycqm
: Cache QoS Monitoringmpx
: Memory Protection Extensionrdt_a
: Resource Director Technology Allocationavx512f
: AVX-512 foundationavx512dq
: AVX-512 Double/Quad instructionsrdseed
: The RDSEED instructionadx
: The ADCX and ADOX instructionssmap
: Supervisor Mode Access Preventionclflushopt
:CLFLUSHOPT
instructionclwb
:CLWB
instructionintel_pt
: Intel Processor Tracingavx512pf
: AVX-512 Prefetchavx512er
: AVX-512 Exponential and Reciprocalavx512cd
: AVX-512 Conflict Detectionsha_ni
: SHA1/SHA256 Instruction Extensionsavx512bw
: AVX-512 Byte/Word instructionsavx512vl
: AVX-512 128/256 Vector Length extensionsExtended state features, CPUID level 0x0000000d:1 (eax)
xsaveopt
: OptimizedXSAVE
xsavec
:XSAVEC
xgetbv1
:XGETBV
with ECX = 1xsaves
:XSAVES
/XRSTORS
Intel-defined CPU QoS sub-leaf, CPUID level 0x0000000F:0 (edx)
cqm_llc
: LLC QoSIntel-defined CPU QoS sub-leaf, CPUID level 0x0000000F:1 (edx)
cqm_occup_llc
: LLC occupancy monitoringcqm_mbm_total
: LLC total MBM monitoringcqm_mbm_local
: LLC local MBM monitoringAMD-defined CPU features, CPUID level 0x80000008 (ebx)
clzero
:CLZERO
instructionirperf
: instructions retired performance counterxsaveerptr
: Always save/restore FP error pointersThermal and Power Management leaf, CPUID level 0x00000006 (eax)
dtherm
(formerlydts
): digital thermal sensorida
: Intel Dynamic Accelerationarat
: Always Running APIC Timerpln
: Intel Power Limit Notificationpts
: Intel Package Thermal Statushwp
: Intel Hardware P-stateshwp_notify
: HWP notificationhwp_act_window
: HWP Activity Windowhwp_epp
: HWP Energy Performance Preferencehwp_pkg_req
: HWP package-level requestAMD SVM Feature Identification, CPUID level 0x8000000a (edx)
npt
: AMD Nested Page Table supportlbrv
: AMD LBR Virtualization supportsvm_lock
: AMD SVM locking MSRnrip_save
: AMD SVM next_rip savetsc_scale
: AMD TSC scaling supportvmcb_clean
: AMD VMCB clean bits supportflushbyasid
: AMD flush-by-ASID supportdecodeassists
: AMD Decode Assists supportpausefilter
: AMD filtered pause interceptpfthreshold
: AMD pause filter thresholdavic
: Virtual Interrupt Controllervmsave_vmload
: Virtual VMSAVE VMLOADvgif
: Virtual GIFIntel-defined CPU features, CPUID level 0x00000007:0 (ecx)
avx512vbmi
: AVX512 Vector Bit Manipulation instructionsumip
: User Mode Instruction Protectionpku
: Protection Keys for Userspaceospke
: OS Protection Keys Enableavx512_vbmi2
: Additional AVX512 Vector Bit Manipulation instructionsgfni
: Galois Field New Instructionsvaes
: Vector AESvpclmulqdq
: Carry-Less Multiplication Double Quadwordavx512_vnni
: Vector Neural Network Instructionsavx512_bitalg
: VPOPCNT[B,W] and VPSHUF-BITQMB instructionsavx512_vpopcntdq
: POPCNT for vectors of DW/QWla57
: 5-level page tablesrdpid
: RDPID instructionAMD-defined CPU features, CPUID level 0x80000007 (ebx)
overflow_recov
: MCA overflow recovery supportsuccor
: uncorrectable error containment and recoverysmca
: Scalable MCADetected CPU bugs (Linux-defined)
f00f
: Intel F00Ffdiv
: CPU FDIVcoma
: Cyrix 6x86 comaamd_tlb_mmatch
:tlb_mmatch
AMD Erratum 383amd_apic_c1e
:apic_c1e
AMD Erratum 40011ap
: Bad local APIC aka 11APfxsave_leak
: FXSAVE leaks FOP/FIP/FOPclflush_monitor
: AAI65, CLFLUSH required before MONITORsysret_ss_attrs
: SYSRET doesn't fix up SS attrsespfix
: "" IRET to 16-bit SS corrupts ESP/RSP high bitsnull_seg
: Nulling a selector preserves the baseswapgs_fence
: SWAPGS without input dep on GSmonitor
: IPI required to wake up remote CPUamd_e400
: CPU is among the affected by Erratum 400cpu_meltdown
: CPU is affected by meltdown attack and needs kernel page table isolationspectre_v1
: CPU is affected by Spectre variant 1 attack with conditional branchesspectre_v2
: CPU is affected by Spectre variant 2 attack with indirect branchesspec_store_bypass
: CPU is affected by the Speculative Store Bypass vulnerability (Spectre variant 4).P.S. This listing was derived from
arch/x86/include/asm/cpufeatures.h
in the kernel source. The flags are listed in the same order as the source code. Please help by adding links to descriptions of features when they're missing, by writing a short description of features that have an unexpressive names, and by updating the list for new kernel versions. The current list is from Linux 4.15 plus some later additions.