How to remove trailing spaces from makefile variable

make

Makefile does not require to bound variable values by quotes.

For instance this will be accepted:

a := ls -l -a > out.txt

My problem is: If I want to do something like this:

a := ls -l -a > out
b := .txt
c := $(a)$(b)

If end of the line of variable $(a) has a white space, variable $(c) will look like this:

ls -l -a > out .txt

With white space after out!

This can cause errors.

Is there a way to globally ignore white spaces at end of line of all makefile variable values?

Best Answer

No, there's no way to change the way make parses variable definitions. If you can't change the point at which variables are defined, you'll have to change the point where they're used.

If you're using GNU make and the variables' values aren't supposed to have significant whitespace inside them, you can use the strip function.

c := $(strip $(a))$(strip $(b))
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