In my previous question, I established that the memory address used by PCI/PCIe devices does not have to mapped to system RAM, but could also refer to "on device" memory, e.g. RAM or registers.
But how are the BARs set up in this case?
Is it simply a case (that during configuration):
- the device advertises that it wishes to expose, for example 16MB of memory,
- BAR gets assigned a base address,
- Thereafter the device maps the offsets to its internal memory?
How does this differ from when the device wishes to access 16MB of system memory (i.e. the device has no memory of its own?)
Thanks!
EDIT: How does the addressing differ between:
A: The device has no memory of its own, e.g. a Video Adapter using shared memory.
B: The device has memory, and shares it with the system (e.g. hypothetical HDD adapter with RAM buffers).
In both cases, are the BARs assigned by the OS and occupy addressable memory?
This distinction is important in a system fully-occupied with RAM (e.g. a 32-bit system with 4 GB RAM installed would be able to support a Video Adapter with 2 GB shared RAM [situation (A)]. But the same system has no address space left over for a hypothetical HDD adapter with onboard 2 GB RAM cache [situation (B)]?
Best Answer
BARs are not used for device buffers in system RAM, and the device does not request such buffers via BARs. Rather the device's host-register interface spec will include a provision that the host must allocate a buffer of a given size - or a size within a specified range - and make it available to the device.
Rather, the host driver will allocate a buffer from system RAM and will tell the device where it is (and, if it's not of fixed size, how big it is), perhaps by simply writing the address to a device register, perhaps as part of a more complex protocol.
The device then accesses the system RAM buffer just as would access buffers associated with I/O operations, by initiating memory read and write transactions directed at the buffer.