cpu
If a CPU clock speed is 1 GHz, which basically triggers a clock signal every 1 ns, but I wonder what's the 'real' travelling time of a signal in a full ALU/register/cache/memory computation cycle?
As far as I know electronic signal travels roughly at light speed 3x10^8 m/s, so it travels 0.3 m in 1 ns. Given the size of a typical CPU, is it the reason why CPU clock is not increasing much along with computing power?
I believe you can achieve lower frequencies from power options menu:
Setting maximum and minimum processor state to some percentage will probably fix the frequency on some level depending on your maximum CPU frequency.
However, this appears not to be under-clocking. A more detailed answer explains this in depth.
It sounds and looks a lot your CPU is being actively limited. Even though your temperature is fine at about 30 degrees you are still locked at 800MHz. To me this pretty much rules out thermal throttling as your CPU would have to be somewhere above 80 or 90.
My guess is that while you are on the "balanced" power plan it has, for whatever reason, gotten corrupted and your "Maximum processor state" has been locked at somewhere close to minimum.
Check that you have something like the image below and that "Maximum processor state" is set to 100%:
Best Answer
The traveling time is just one tiny factor in determining the maximum clock speed of a CPU. Other factors include:
How much power can be delivered to the CPU? CMOS circuits have an increasing power requirement as their clock frequency goes up because it takes a certain amount of power to flip a circuit on or off and the higher the clock frequency, the more often you are doing that.
How much heat can the CPU dissipate? See 1 for why heat increases with frequency.
How long does it take to switch a signal from definite 0 to a definite 1? The signal can't start propagating until the source is able to produce it.
How long is the path and how many switches do we want to be able to accommodate in a single clock cycle. You can get the clock very high by having only a single switch and a short path, but that makes the circuit design very complicated and large. You may want to allow three or four circuits to process data between the start and end of a single clock operation, and that means more time for transitions and propagation is needed between clock cycles.
How long does it take the received signal to stabilize and to be reliably detected or latched by the next input? You can make this faster by tying inputs to each output, but that also makes the design complex. Say one output feeds ten inputs. Do you connect all ten inputs to the output? But then it will take a long time to drive all those inputs. Or do you fan it out through a gate? But then your propagation distance is longer and you need to wait for that gate to switch before the output even starts getting delivered to the next inputs.